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MICRO
2006
IEEE
111views Hardware» more  MICRO 2006»
14 years 1 months ago
Memory Prefetching Using Adaptive Stream Detection
We present Adaptive Stream Detection, a simple technique for modulating the aggressiveness of a stream prefetcher to match a workload’s observed spatial locality. We use this co...
Ibrahim Hur, Calvin Lin
IPPS
2006
IEEE
14 years 1 months ago
An optimal architecture for a DDC
Digital Down Conversion (DDC) is an algorithm, used to lower the amount of samples per second by selecting a limited frequency band out of a stream of samples. A possible DDC algo...
Tjerk Bijlsma, Pascal T. Wolkotte, Gerard J. M. Sm...
ASPDAC
2009
ACM
141views Hardware» more  ASPDAC 2009»
13 years 11 months ago
Adaptive inter-router links for low-power, area-efficient and reliable Network-on-Chip (NoC) architectures
Abstract-- The increasing wire delay constraints in deep submicron VLSI designs have led to the emergence of scalable and modular Network-on-Chip (NoC) architectures. As the power ...
Avinash Karanth Kodi, Ashwini Sarathy, Ahmed Louri...
INFOCOM
2007
IEEE
14 years 1 months ago
Transmit Power Distribution of Wireless Ad Hoc Networks with Topology Control
— Topology control and routing protocols are used by designers of wireless packet data networks to lower the node degree, simplify routing and lower the nodes’ energy consumpti...
Dan Avidor, Sayandev Mukherjee, Furuzan Atay Onat
CASES
2007
ACM
13 years 11 months ago
Cache leakage control mechanism for hard real-time systems
Leakage energy consumption is an increasingly important issue as the technology continues to shrink. Since on-chip caches constitute a major portion of the processor's transi...
Jaw-Wei Chi, Chia-Lin Yang, Yi-Jung Chen, Jian-Jia...