For data dominated applications, the system level design trajectory should first focus on finding a good data transfer and storage solution. Since no realization details are avail...
Per Gunnar Kjeldsberg, Francky Catthoor, Einar J. ...
We address the problem of estimating controller delay from high-level specifications during behavioral synthesis. Typically, the critical path of a synthesised behavioral design g...
Gagan Raj Gupta, Madhur Gupta, Preeti Ranjan Panda
This paper addresses two aspects of low-power design for FPGA circuits. First, we present an RT-level power estimator for FPGAs with consideration of wire length. The power estima...
- Many high-level description languages, such as C/C++ or Java, lack the capability to specify the bitwidth information for variables and operations. Synthesis from these specifica...
Jason Cong, Yiping Fan, Guoling Han, Yizhou Lin, J...
In a hardware-software co-design environment, an application is partitioned into modules. Each module is then mapped either to software or to hardware. The mapping process is driv...
Basant Kumar Dwivedi, Arun Kejariwal, M. Balakrish...