501 search results - page 19 / 101 » Evaluating CMPs and Their Memory Architecture |
PLDI
1994
ACM
13 years 11 months ago
1994
ACM
As microprocessor speeds increase, memory bandwidth is increasing y the performance bottleneck for microprocessors. This has occurred because innovation and technological improvem...
HPCA
2005
IEEE
14 years 8 months ago
2005
IEEE
Memory leaks and memory corruption are two major forms of software bugs that severely threaten system availability and security. According to the US-CERT Vulnerability Notes Datab...
MICRO
2009
IEEE
14 years 2 months ago
2009
IEEE
Dynamic Random Access Memory (DRAM) is used as the bulk of the main memory in most computing systems and its energy and power consumption has become a first-class design considera...
ISCAPDCS
2001
13 years 9 months ago
2001
This paper presents the evaluation of a non-blocking, decoupled memory/execution, multithreaded architecture known as the Scheduled Dataflow (SDF). The major recent trend in digit...
ASAP
2010
IEEE
13 years 9 months ago
2010
IEEE
Abstract--Polynomial approximation is a very general technique for the evaluation of a wide class of numerical functions of one variable. This article details an architecture gener...