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» Evaluating CMPs and Their Memory Architecture
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ICS
2007
Tsinghua U.
14 years 1 months ago
Cooperative cache partitioning for chip multiprocessors
This paper presents Cooperative Cache Partitioning (CCP) to allocate cache resources among threads concurrently running on CMPs. Unlike cache partitioning schemes that use a singl...
Jichuan Chang, Gurindar S. Sohi
DATE
2002
IEEE
114views Hardware» more  DATE 2002»
14 years 19 days ago
A Video Compression Case Study on a Reconfigurable VLIW Architecture
In this paper, we investigate the benefits of a flexible, application-specific instruction set by adding a run-time Reconfigurable Functional Unit (RFU) to a VLIW processor. Preli...
Davide Rizzo, Osvaldo Colavin
IPPS
2010
IEEE
13 years 5 months ago
Restructuring parallel loops to curb false sharing on multicore architectures
The memory hierarchy of most multicore systems contains one or more levels of cache that is shared among multiple cores. The shared-cache architecture presents many opportunities f...
Santosh Sarangkar, Apan Qasem
DAC
2006
ACM
14 years 1 months ago
High-performance operating system controlled memory compression
This article describes a new software-based on-line memory compression algorithm for embedded systems and presents a method of adaptively managing the uncompressed and compressed ...
Lei Yang, Haris Lekatsas, Robert P. Dick
ISCA
1997
IEEE
135views Hardware» more  ISCA 1997»
13 years 12 months ago
The Design and Analysis of a Cache Architecture for Texture Mapping
The effectiveness of texture mapping in enhancing the realism of computer generated imagery has made support for real-time texture mapping a critical part of graphics pipelines. D...
Ziyad S. Hakura, Anoop Gupta