501 search results - page 81 / 101 » Evaluating CMPs and Their Memory Architecture |
ACSAC
2006
IEEE
14 years 1 months ago
2006
IEEE
Address space randomization is an emerging and promising method for stopping a broad range of memory corruption attacks. By randomly shifting critical memory regions at process in...
TPDS
2002
13 years 7 months ago
2002
This paper presents a new distributed disk-array architecture for achieving high I/O performance in scalable cluster computing. In a serverless cluster of computers, all distribute...
TVLSI
2010
13 years 2 months ago
2010
This paper proposes a low-power high-throughput digital signal processor (DSP) for baseband processing in wireless terminals. It builds on our earlier architecture--Signal processi...
FPGA
2010
ACM
13 years 7 months ago
2010
ACM
We use reconfigurable hardware to construct a high throughput Bayesian computing machine (BCM) capable of evaluating probabilistic networks with arbitrary DAG (directed acyclic gr...
TC
2008
13 years 7 months ago
2008
This paper examines the hardware implementation trade-offs when evaluating functions via piecewise polynomial approximations and interpolations for precisions of up to 24 bits. In ...