1304 search results - page 227 / 261 » Evaluating Hardware Compilation Techniques |
WMCSA
2012
IEEE
12 years 4 months ago
2012
IEEE
The rapid growth of location-based applications has spurred extensive research on localization. Nonetheless, indoor localization remains an elusive problem mostly because the accu...
TCAD
2008
13 years 8 months ago
2008
Three-dimensional integration has the potential to improve the communication latency and integration density of chip-level multiprocessors (CMPs). However, the stacked highpower de...
IEEEPACT
2006
IEEE
14 years 3 months ago
2006
IEEE
With reducing feature size, increasing chip capacity, and increasing clock speed, microprocessors are becoming increasingly susceptible to transient (soft) errors. Redundant multi...
MICRO
2006
IEEE
14 years 3 months ago
2006
IEEE
Power delivery is a growing reliability concern in microprocessors as the industry moves toward feature-rich, powerhungrier designs. To battle the ever-aggravating power consumpti...
DATE
2010
IEEE
14 years 2 months ago
2010
IEEE
— In this paper, we examine the impact of application task mapping on the reliability of MPSoC in the presence of single-event upsets (SEUs). We propose a novel soft erroraware d...