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» Evaluating Hardware Compilation Techniques
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CODES
2003
IEEE
14 years 29 days ago
A multiobjective optimization model for exploring multiprocessor mappings of process networks
In the Sesame framework, we develop a modeling and simulation environment for the efficient design space exploration of heterogeneous embedded systems. Since Sesame recognizes se...
Cagkan Erbas, Selin C. Erbas, Andy D. Pimentel
ISLPED
2003
ACM
122views Hardware» more  ISLPED 2003»
14 years 27 days ago
A mixed-clock issue queue design for globally asynchronous, locally synchronous processor cores
Ever shrinking device sizes and innovative micro-architectural and circuit design techniques have made it possible to have multi-million transistor systems running at multi-gigahe...
Venkata Syam P. Rapaka, Diana Marculescu
IPMI
2003
Springer
14 years 25 days ago
Ideal-Observer Performance under Signal and Background Uncertainty
We use the performance of the Bayesian ideal observer as a figure of merit for hardware optimization because this observer makes optimal use of signal-detection information. Due t...
Subok Park, Matthew A. Kupinski, Eric Clarkson, Ha...
MPC
2010
Springer
181views Mathematics» more  MPC 2010»
14 years 13 days ago
Process Algebras for Collective Dynamics
d Abstract) Jane Hillston Laboratory for Foundations of Computer Science, The University of Edinburgh, Scotland Quantitative Analysis Stochastic process algebras extend classical p...
Jane Hillston
CIKM
2001
Springer
14 years 5 days ago
PowerDB-IR - Information Retrieval on Top of a Database Cluster
Our current concern is a scalable infrastructure for information retrieval (IR) with up-to-date retrieval results in the presence of frequent, continuous updates. Timely processin...
Torsten Grabs, Klemens Böhm, Hans-Jörg S...