Sciweavers

201 search results - page 36 / 41
» Evaluating Run-Time Techniques for Leakage Power Reduction
Sort
View
MICRO
2003
IEEE
99views Hardware» more  MICRO 2003»
14 years 26 days ago
Power-driven Design of Router Microarchitectures in On-chip Networks
As demand for bandwidth increases in systems-on-a-chip and chip multiprocessors, networks are fast replacing buses and dedicated wires as the pervasive interconnect fabric for on-...
Hangsheng Wang, Li-Shiuan Peh, Sharad Malik
CODES
2004
IEEE
13 years 11 months ago
Compiler-directed code restructuring for reducing data TLB energy
Prior work on TLB power optimization considered circuit and architectural techniques. A recent software-based technique for data TLBs has considered the possibility of storing the...
Mahmut T. Kandemir, Ismail Kadayif, Guilin Chen
GLVLSI
2010
IEEE
156views VLSI» more  GLVLSI 2010»
14 years 20 days ago
A multi-level approach to reduce the impact of NBTI on processor functional units
NBTI is one of the most important silicon reliability problems facing processor designers today. The impact of NBTI can be mitigated at both the circuit and microarchitecture leve...
Taniya Siddiqua, Sudhanva Gurumurthi
PKC
2012
Springer
255views Cryptology» more  PKC 2012»
11 years 10 months ago
Better Bootstrapping in Fully Homomorphic Encryption
Gentry’s bootstrapping technique is currently the only known method of obtaining a “pure” fully homomorphic encryption (FHE) schemes, and it may offers performance advantage...
Craig Gentry, Shai Halevi, Nigel P. Smart
CIKM
2001
Springer
13 years 11 months ago
Sliding-Window Filtering: An Efficient Algorithm for Incremental Mining
We explore in this paper an effective sliding-window filtering (abbreviatedly as SWF) algorithm for incremental mining of association rules. In essence, by partitioning a transact...
Chang-Hung Lee, Cheng-Ru Lin, Ming-Syan Chen