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» Evaluation of CORDIC Algorithms for FPGA Design
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DATE
2009
IEEE
171views Hardware» more  DATE 2009»
14 years 2 months ago
Automatic generation of streaming datapaths for arbitrary fixed permutations
Abstract—This paper presents a technique to perform arbitrary fixed permutations on streaming data. We describe a parameterized architecture that takes as input n data points st...
Peter A. Milder, James C. Hoe, Markus Püschel
CODES
2005
IEEE
14 years 1 months ago
High-level synthesis for large bit-width multipliers on FPGAs: a case study
In this paper, we present the analysis, design and implementation of an estimator to realize large bit width unsigned integer multiplier units. Larger multiplier units are require...
Gang Quan, James P. Davis, Siddhaveerasharan Devar...
TC
2010
13 years 5 months ago
Network-on-Chip Hardware Accelerators for Biological Sequence Alignment
—The most pervasive compute operation carried out in almost all bioinformatics applications is pairwise sequence homology detection (or sequence alignment). Due to exponentially ...
Souradip Sarkar, Gaurav Ramesh Kulkarni, Partha Pr...
SIGCOMM
2010
ACM
13 years 7 months ago
SourceSync: a distributed wireless architecture for exploiting sender diversity
Diversity is an intrinsic property of wireless networks. Recent years have witnessed the emergence of many distributed protocols like ExOR, MORE, SOAR, SOFT, and MIXIT that exploi...
Hariharan Rahul, Haitham Hassanieh, Dina Katabi