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» Evaluation of current architecture frameworks
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ASPDAC
2004
ACM
96views Hardware» more  ASPDAC 2004»
14 years 1 months ago
Rate analysis for streaming applications with on-chip buffer constraints
While mapping a streaming (such as multimedia or network packet processing) application onto a specified architecture, an important issue is to determine the input stream rates tha...
Alexander Maxiaguine, Simon Künzli, Samarjit ...
ARC
2006
Springer
157views Hardware» more  ARC 2006»
14 years 1 months ago
PISC: Polymorphic Instruction Set Computers
We introduce a new paradigm in the computer architecture referred to as Polymorphic Instruction Set Computers (PISC). This new paradigm, in difference to RISC/CISC, introduces hard...
Stamatis Vassiliadis, Georgi Kuzmanov, Stephan Won...
ISCA
2011
IEEE
225views Hardware» more  ISCA 2011»
13 years 1 months ago
FlexBulk: intelligently forming atomic blocks in blocked-execution multiprocessors to minimize squashes
Blocked-execution multiprocessor architectures continuously run atomic blocks of instructions — also called Chunks. Such architectures can boost both performance and software pr...
Rishi Agarwal, Josep Torrellas
SC
2000
ACM
14 years 2 months ago
Performance of Hybrid Message-Passing and Shared-Memory Parallelism for Discrete Element Modeling
The current trend in HPC hardware is towards clusters of shared-memory (SMP) compute nodes. For applications developers the major question is how best to program these SMP cluster...
D. S. Henty
ICC
2008
IEEE
118views Communications» more  ICC 2008»
14 years 4 months ago
Bounded-Variance Network Calculus: Computation of Tight Approximations of End-to-End Delay
Abstract ⎯ Currently, the most advanced framework for stochastic network calculus is the min-plus algebra, providing bounds for the end-to-end delay in networks. The bounds calcu...
Paolo Giacomazzi, Gabriella Saddemi