Sciweavers

1615 search results - page 300 / 323
» Evaluation of current architecture frameworks
Sort
View
HPCA
2006
IEEE
14 years 7 months ago
Exploiting parallelism and structure to accelerate the simulation of chip multi-processors
Simulation is an important means of evaluating new microarchitectures. Current trends toward chip multiprocessors (CMPs) try the ability of designers to develop efficient simulato...
David A. Penry, Daniel Fay, David Hodgdon, Ryan We...
HPCA
2002
IEEE
14 years 7 months ago
Exploiting Choice in Resizable Cache Design to Optimize Deep-Submicron Processor Energy-Delay
Cache memories account for a significant fraction of a chip's overall energy dissipation. Recent research advocates using "resizable" caches to exploit cache requir...
Se-Hyun Yang, Michael D. Powell, Babak Falsafi, T....
EDBT
2004
ACM
115views Database» more  EDBT 2004»
14 years 7 months ago
QuaSAQ: An Approach to Enabling End-to-End QoS for Multimedia Databases
Abstract. The paper discusses the design and prototype implementation of a QoS-aware multimedia database system. Recent research in multimedia databases has devoted little attentio...
Yi-Cheng Tu, Sunil Prabhakar, Ahmed K. Elmagarmid,...
MOBISYS
2008
ACM
14 years 7 months ago
Efficient channel-aware rate adaptation in dynamic environments
Increasingly, 802.11 devices are being used by mobile users. This results in very dynamic wireless channels that are difficult to use efficiently. Current rate selection algorithm...
Glenn Judd, Xiaohui Wang, Peter Steenkiste
ICCAD
2008
IEEE
97views Hardware» more  ICCAD 2008»
14 years 4 months ago
Integrated code and data placement in two-dimensional mesh based chip multiprocessors
— As transistor sizes continue to shrink and the number of transistors per chip keeps increasing, chip multiprocessors (CMPs) are becoming a promising alternative to remain on th...
Taylan Yemliha, Shekhar Srikantaiah, Mahmut T. Kan...