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MICRO
2007
IEEE
135views Hardware» more  MICRO 2007»
14 years 3 months ago
Microarchitectural Design Space Exploration Using an Architecture-Centric Approach
The microarchitectural design space of a new processor is too large for an architect to evaluate in its entirety. Even with the use of statistical simulation, evaluation of a sing...
Christophe Dubach, Timothy M. Jones, Michael F. P....
VLSID
2002
IEEE
99views VLSI» more  VLSID 2002»
14 years 9 months ago
Input Space Adaptive Embedded Software Synthesis
This paper presents a novel technique, called input space adaptive software synthesis, for the energy and performance optimization of embedded software. The proposed technique is ...
Weidong Wang, Anand Raghunathan, Ganesh Lakshminar...
MICRO
2008
IEEE
131views Hardware» more  MICRO 2008»
14 years 3 months ago
Token flow control
As companies move towards many-core chips, an efficient onchip communication fabric to connect these cores assumes critical importance. To address limitations to wire delay scala...
Amit Kumar 0002, Li-Shiuan Peh, Niraj K. Jha
RTAS
2008
IEEE
14 years 3 months ago
Real-Time Dynamic Power Management through Device Forbidden Regions
Dynamic Power Management (DPM) techniques are crucial in minimizing the overall energy consumption in real-time embedded systems. The timing constraints of real-time applications ...
Vinay Devadas, Hakan Aydin
LCTRTS
2007
Springer
14 years 3 months ago
Addressing instruction fetch bottlenecks by using an instruction register file
The Instruction Register File (IRF) is an architectural extension for providing improved access to frequently occurring instructions. An optimizing compiler can exploit an IRF by ...
Stephen Roderick Hines, Gary S. Tyson, David B. Wh...