558 search results - page 38 / 112 » Evaluation of the JIAJIA Software DSM System on High Perform... |
ACSC
2003
IEEE
14 years 26 days ago
2003
IEEE
Time-triggered systems require a very high degree of temporal accuracy at critical stages during run time. While many software fault injection environments exist today, none of th...
ISCA
2006
IEEE
14 years 1 months ago
2006
IEEE
This paper presents a high-availability system architecture called INDRA — an INtegrated framework for Dependable and Revivable Architecture that enhances a multicore processor ...
DAC
2005
ACM
14 years 8 months ago
2005
ACM
While the past research discussed several advantages of multiprocessor-system-on-a-chip (MPSOC) architectures from both area utilization and design verification perspectives over ...
IOPADS
1996
13 years 9 months ago
1996
Many parallel scientific applications need high-performance I/O. Unfortunately, end-to-end parallel-I/O performance has not been able to keep up with substantial improvements in p...
TC
2011
13 years 2 months ago
2011
—CMOS scaling has long been a source of dramatic performance gains. However, semiconductor feature size reduction has resulted in increasing levels of operating temperatures and ...