469 search results - page 19 / 94 » Evolutionary Approach to Test Generation for Functional BIST |
138
Voted
VTS
2002
IEEE
15 years 8 months ago
2002
IEEE
We present a software-based weighted random pattern scheme for testing delay faults in IP cores of programmable SoCs. We describe a method for determining static and transition pr...
133
click to vote
DATE
2005
IEEE
15 years 9 months ago
2005
IEEE
Functional verification of microprocessors is one of the most complex and expensive tasks in the current system-on-chip design process. A significant bottleneck in the validatio...
110
click to vote
TCAD
2010
14 years 10 months ago
2010
Abstract--Functional verification is one of the major bottlenecks in system-on-chip design due to the combined effects of increasing complexity and lack of automated techniques for...
146
click to vote
DATE
2006
IEEE
15 years 9 months ago
2006
IEEE
Functional validation is a major bottleneck in pipelined processor design. Simulation using functional test vectors is the most widely used form of processor validation. While exi...
133
Voted
IICAI
2007
15 years 4 months ago
2007
The paper presents first results of a project that aims at building a model-based tool for functional testing of control software for passenger vehicles. The objective is that this...