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DATE
2009
IEEE
119views Hardware» more  DATE 2009»
14 years 2 months ago
On-chip communication architecture exploration for processor-pool-based MPSoC
— MPSoC is evolving towards processor-pool (PP)-based architectures, which employ hierarchical on-chip network for inter- and intra-PP communication. Since the design space of PP...
Young-Pyo Joo, Sungchan Kim, Soonhoi Ha
DATE
2009
IEEE
151views Hardware» more  DATE 2009»
14 years 2 months ago
Combined system synthesis and communication architecture exploration for MPSoCs
In this paper, a novel design space exploration approach is proposed that enables a concurrent optimization of the topology, the process binding, and the communication routing of ...
Martin Lukasiewycz, Martin Streubühr, Michael...
CLADE
2003
IEEE
14 years 1 months ago
vGrid: A Framework For Building Autonomic Applications
With rapid technological advances in network infrastructure, programming languages, compatible component interfaces and so many more areas, today the computational Grid has evolve...
Bithika Khargharia, Salim Hariri, Manish Parashar,...
ASAP
2007
IEEE
118views Hardware» more  ASAP 2007»
13 years 9 months ago
Evaluation of a Tightly Coupled ASIP / Co-Processor Architecture Used in GNSS Receivers
This paper presents the enhancement of an ASIP’s floating point performance by coupling of a co-processor and adding of special instructions. Processor hardware modifications an...
Götz Kappen, S. el Bahri, O. Priebe, Tobias G...
ISMVL
2008
IEEE
126views Hardware» more  ISMVL 2008»
14 years 2 months ago
Betweenness, Metrics and Entropies in Lattices
We investigate a class of metrics on lattices that are compatible with the partial order defined by the lattice using the ternary relation of betweenness that can be naturally de...
Dan A. Simovici