122 search results - page 11 / 25 » Evolvable Hardware for the Generation of Sequential Filter C... |
DATE
2007
IEEE
14 years 1 months ago
2007
IEEE
This paper presents a built-in self-test (BiST) scheme for analog to digital converters (ADC) based on a linear ramp generator and efficient output analysis. The proposed analysi...
DATE
1999
IEEE
13 years 11 months ago
1999
IEEE
In this paper we propose an efficient transient test generation method to comprehensively test analog circuits using minimum test time. A divide and conquer strategy is formulated...
CAI
2004
Springer
13 years 6 months ago
2004
Springer
A complete hardware implementation of an evolvable combinational unit for FPGAs is presented. The proposed combinational unit consisting of a virtual reconfigurable circuit and evo...
DATE
1999
IEEE
13 years 11 months ago
1999
IEEE
Methods for performing component matching by expressing an arithmetic specification and a bit-level description of an implementation as word-level polynomials have been demonstrat...
ISLPED
1997
ACM
13 years 10 months ago
1997
ACM
New measures of peak power in the context of sequential circuits are proposed. This paper presents an automatic procedure to obtain very good lower bounds on these measures as wel...