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ACSC
2004
IEEE
13 years 11 months ago
Exploiting FPGA Concurrency to Enhance JVM Performance
The Java Programming Language has been praised for its platform independence and portability, but because of its slow execution speed on a software Java Virtual Machine (JVM), som...
James Parnis, Gareth Lee
IEEEPACT
2005
IEEE
14 years 1 months ago
Exploiting Coarse-Grained Parallelism to Accelerate Protein Motif Finding with a Network Processor
While general-purpose processors have only recently employed chip multiprocessor (CMP) architectures, network processors (NPs) have used heterogeneous multi-core architectures sin...
Ben Wun, Jeremy Buhler, Patrick Crowley
CHARME
2005
Springer
106views Hardware» more  CHARME 2005»
14 years 28 days ago
Error Detection Using BMC in a Parallel Environment
In this paper, we explore a parallelization of BMC based on state space partitioning. The parallelization is accomplished by executing multiple instances of BMC independently from ...
Subramanian K. Iyer, Jawahar Jain, Mukul R. Prasad...
CODES
2003
IEEE
14 years 21 days ago
Deriving process networks from weakly dynamic applications in system-level design
We present an approach to the automatic derivation of executable Process Network specifications from Weakly Dynamic Applications. We introduce the notions of Dynamic Single Assig...
Todor Stefanov, Ed F. Deprettere
HPCA
2007
IEEE
14 years 7 months ago
HARD: Hardware-Assisted Lockset-based Race Detection
The emergence of multicore architectures will lead to an increase in the use of multithreaded applications that are prone to synchronization bugs, such as data races. Software sol...
Pin Zhou, Radu Teodorescu, Yuanyuan Zhou