3893 search results - page 748 / 779 » Execution Architectures and Compilation |
HPCA
2006
IEEE
14 years 10 months ago
2006
IEEE
Transactional memory (TM) simplifies parallel programming by guaranteeing that transactions appear to execute atomically and in isolation. Implementing these properties includes p...
HPCA
2006
IEEE
14 years 10 months ago
2006
IEEE
Computer systems increasingly rely on dynamic, phasebased system management techniques, in which system hardware and software parameters may be altered or tuned at runtime for dif...
HPCA
2004
IEEE
14 years 10 months ago
2004
IEEE
Recent research suggests that there are large variations in a cache's spatial usage, both within and across programs. Unfortunately, conventional caches typically employ fixe...
HPCA
2002
IEEE
14 years 10 months ago
2002
IEEE
Cache memories account for a significant fraction of a chip's overall energy dissipation. Recent research advocates using "resizable" caches to exploit cache requir...
SIGMOD
2009
ACM
14 years 10 months ago
2009
ACM
There is currently considerable enthusiasm around the MapReduce (MR) paradigm for large-scale data analysis [17]. Although the basic control flow of this framework has existed in ...