453 search results - page 28 / 91 » Execution and Cache Performance of the Scheduled Dataflow Ar... |
MICRO
2002
IEEE
13 years 7 months ago
2002
IEEE
On-chip caches represent a sizeable fraction of the total power consumption of microprocessors. Although large caches can significantly improve performance, they have the potentia...
MICRO
1999
IEEE
13 years 12 months ago
1999
IEEE
Recent studies on value locality reveal that many instructions are frequently executed with a small variety of inputs. This paper proposes an approach that integrates architecture...
ICMCS
2006
IEEE
14 years 1 months ago
2006
IEEE
This paper proposes a new architecture for efficient variable-length decoding (VLD) of entropy-coded data for multimedia applications on general-purpose processors. It improves o...
CASES
2009
ACM
14 years 2 months ago
2009
ACM
Coarse-grained reconfigurable architectures (CGRAs) present an appealing hardware platform by providing programmability with the potential for high computation throughput, scalab...
HPCA
2002
IEEE
14 years 8 months ago
2002
IEEE
Cache memories account for a significant fraction of a chip's overall energy dissipation. Recent research advocates using "resizable" caches to exploit cache requir...