165 search results - page 11 / 33 » Exhaustive Optimization Phase Order Space Exploration |
163
Voted
CASES
2007
ACM
2007
ACM
INTACTE: an interconnect area, delay, and energy estimation tool for microarchitectural explorations
15 years 7 months ago
Prior work on modeling interconnects has focused on optimizing the wire and repeater design for trading off energy and delay, and is largely based on low level circuit parameters....
160
Voted
PSTV
1992
15 years 4 months ago
1992
We study the effect of three new reduction strategies for conventional reachability analysis, as used in automated protocol validation algorithms. The first two strategies are imp...
144
Voted
LCTRTS
1999
Springer
15 years 8 months ago
1999
Springer
Code space is a critical issue facing designers of software for embedded systems. Many traditional compiler optimizations are designed to reduce the execution time of compiled cod...
138
Voted
ICMLA
2008
15 years 5 months ago
2008
We apply five classification methods, Neural Nets(NN), Bayesian Nets(BN), Naive Bayes(NB), Artificial Immune Systems(AIS) [4] and Decision Trees(DT), to credit card fraud detectio...
147
Voted
ICCAD
1997
IEEE
15 years 7 months ago
1997
IEEE
Traditional synthesis techniques optimize CMOS circuits in two phases i) logic minimization and ii) library mapping phase. Typically, the structures and the sizes of the gates in ...