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CODES
2006
IEEE
14 years 2 months ago
Streamroller: : automatic synthesis of prescribed throughput accelerator pipelines
In this paper, we present a methodology for designing a pipeline of accelerators for an application. The application is modeled using sequential C language with simple stylization...
Manjunath Kudlur, Kevin Fan, Scott A. Mahlke
CODES
2007
IEEE
14 years 22 days ago
Energy efficient co-scheduling in dynamically reconfigurable systems
Energy consumption is a major issue in dynamically reconfigurable systems because of the high power requirements during repeated configurations. Hardware designs employ low power ...
Pao-Ann Hsiung, Pin-Hsien Lu, Chih-Wen Liu
FCCM
2006
IEEE
101views VLSI» more  FCCM 2006»
14 years 2 months ago
A Type Architecture for Hybrid Micro-Parallel Computers
Recently, platform FPGAs that integrate sequential processors with a spatial fabric have become prevalent. While these hybrid architectures ease the burden of integrating sequenti...
Benjamin Ylvisaker, Brian Van Essen, Carl Ebeling
TEI
2009
ACM
120views Hardware» more  TEI 2009»
14 years 3 months ago
W41K: digitally augmenting traditional game environments
Augmented game environments use unobtrusively embedded technology to augment traditional games with virtual information and novel interaction capabilities. This article establishe...
Steve Hinske, Marc Langheinrich
DATE
2009
IEEE
149views Hardware» more  DATE 2009»
14 years 3 months ago
An ILP formulation for task mapping and scheduling on multi-core architectures
Multi-core architectures are increasingly being adopted in the design of emerging complex embedded systems. Key issues of designing such systems are on-chip interconnects, memory a...
Ying Yi, Wei Han, Xin Zhao, Ahmet T. Erdogan, Tugh...