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» Experiences in Hardware Trojan Design and Implementation
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IESS
2009
Springer
182views Hardware» more  IESS 2009»
13 years 7 months ago
Modeling Cache Effects at the Transaction Level
Abstract. Embedded system design complexities are growing exponentially. Demand has increased for modeling techniques that can provide both accurate measurements of delay and fast ...
Ardavan Pedram, David Craven, Andreas Gerstlauer
ISPD
1999
ACM
128views Hardware» more  ISPD 1999»
14 years 2 months ago
Transistor level micro-placement and routing for two-dimensional digital VLSI cell synthesis
There is an increasing need in modern VLSI designs for circuits implemented in high-performance logic families such as Cascode Voltage Switch Logic, Pass Transistor Logic, and dom...
Michael A. Riepe, Karem A. Sakallah
ECBS
2004
IEEE
115views Hardware» more  ECBS 2004»
14 years 1 months ago
Supporting Evolutionary Development by Feature Models and Traceability Links
During their usage, software systems have to be changed constantly. If such changes are implemented in an incomplete or inconsistent way a loss of architectural quality will occur...
Matthias Riebisch
ICCAD
2003
IEEE
134views Hardware» more  ICCAD 2003»
14 years 6 months ago
Multi-Domain Clock Skew Scheduling
The application of general clock skew scheduling is practically limited due to the difficulties in implementing a wide spectrum of dedicated clock delays in a reliable manner. Th...
Kaushik Ravindran, Andreas Kuehlmann, Ellen Sentov...
ICCAD
2005
IEEE
160views Hardware» more  ICCAD 2005»
14 years 6 months ago
Equivalence verification of polynomial datapaths with fixed-size bit-vectors using finite ring algebra
— This paper addresses the problem of equivalence verification of RTL descriptions. The focus is on datapathoriented designs that implement polynomial computations over fixed-s...
Namrata Shekhar, Priyank Kalla, Florian Enescu, Si...