69 search results - page 5 / 14 » Experiences in simulating a declarative multiprocessor |
CAISE
2003
Springer
14 years 22 days ago
2003
Springer
The use of simulation for a pedagogical purpose is very interesting. One of the essential repercussions of the construction of a pedagogical simulator is the perennisation of the â...
DATE
2009
IEEE
14 years 2 months ago
2009
IEEE
— In this paper, we propose a novel, energy aware scheduling algorithm for applications running on DVS-enabled multiprocessor systems, which exploits variation in execution times...
EUC
2006
Springer
13 years 11 months ago
2006
Springer
We present the first Utility Accrual (or UA) real-time scheduling algorithm for multiprocessors, called gMUA. The algorithm considers an application model where real-time activiti...
IEEEPACT
2003
IEEE
14 years 23 days ago
2003
IEEE
We investigate the implementation of IP look-up for core routers using multiple microengines and a tailored memory hierarchy. The main architectural concerns are limiting the numb...
FPL
2007
Springer
13 years 11 months ago
2007
Springer
Recently, there is a surge of interests in using FPGAs for computer architecture research including applications from emulating and analyzing a new platform to accelerating microa...