774 search results - page 22 / 155 » Experiences of low power design implementation and verificat... |
ICCAD
2002
IEEE
14 years 5 months ago
2002
IEEE
This paper describes an optimization technique able to optimize a complete wireless receiver architecture in a reasonable amount of time. The optimizer alternates between spice le...
ISLPED
1999
ACM
14 years 1 months ago
1999
ACM
This paper describes a new mixed-swing topology for dual-rail domino logic that results in a simultaneous energy and delay reduction. HSPICE simulation results for a 1-bit full ad...
VLSID
2007
IEEE
14 years 9 months ago
2007
IEEE
A low-power frequency multiplication technique, developed for ZigBee (IEEE 802.15.4) like applications is presented. We have provided an estimate for the power consumption for a g...
ISPD
2009
ACM
14 years 3 months ago
2009
ACM
Glitches (spurious transitions) are common in electronic circuits. In this paper we present a novel approach to reduce dynamic power in FPGAs by reducing glitches during the routi...
ASPDAC
2011
ACM
13 years 8 days ago
2011
ACM
- In low temperature polycrystalline silicon (LTPS) based display technologies, the electrical parameter variations in thin film transistors (TFTs) caused by random grain boundarie...