Sciweavers

352 search results - page 18 / 71
» Experiences with Soft-Core Processor Design
Sort
View
MICRO
2003
IEEE
125views Hardware» more  MICRO 2003»
14 years 1 months ago
Runtime Power Monitoring in High-End Processors: Methodology and Empirical Data
With power dissipation becoming an increasingly vexing problem across many classes of computer systems, measuring power dissipation of real, running systems has become crucial for...
Canturk Isci, Margaret Martonosi
RTAS
2008
IEEE
14 years 2 months ago
WCET Analysis for Multi-Core Processors with Shared L2 Instruction Caches
Multi-core chips have been increasingly adopted by microprocessor industry. For real-time systems to safely harness the potential of multi-core computing, designers must be able t...
Jun Yan, Wei Zhang
SAC
2006
ACM
14 years 1 months ago
Building the functional performance model of a processor
In this paper, we present an efficient procedure for building a piecewise linear function approximation of the speed function of a processor with hierarchical memory structure. Th...
Alexey L. Lastovetsky, Ravi Reddy, Robert Higgins
LCPC
2004
Springer
14 years 1 months ago
Power-Aware Scheduling for Parallel Security Processors with Analytical Models
Techniques to reduce power dissipation for embedded systems have recently come into sharp focus in the technology development. Among these techniques, dynamic voltage scaling (DVS)...
Yung-Chia Lin, Yi-Ping You, Chung-Wen Huang, Jenq ...
CODES
2005
IEEE
14 years 1 months ago
Aggregating processor free time for energy reduction
Even after carefully tuning the memory characteristics to the application properties and the processor speed, during the execution of real applications there are times when the pr...
Aviral Shrivastava, Eugene Earlie, Nikil D. Dutt, ...