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» Experiences with Soft-Core Processor Design
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ISSS
1997
IEEE
83views Hardware» more  ISSS 1997»
14 years 2 days ago
A Scheduling and Pipelining Algorithm for Hardware/Software Systems
Given a hardware/software partitioned specification and an allocation (number and type) of processors, we present an algorithm to (1) map each of the software behaviors (or tasks...
Smita Bakshi, Daniel Gajski
DSD
2002
IEEE
86views Hardware» more  DSD 2002»
14 years 25 days ago
Using Formal Tools to Study Complex Circuits Behaviour
We use a formal tool to extract Finite State Machines (FSM) based representations (lists of states and transitions) of sequential circuits described by flip-flops and gates. The...
Paul Amblard, Fabienne Lagnier, Michel Lévy
DSD
2009
IEEE
126views Hardware» more  DSD 2009»
13 years 11 months ago
Architecture-Driven Synthesis of Reconfigurable Cells
In this paper, we present a novel method for merging sets of computational patterns into a reconfigurable cell respecting design constraints and optimizing specific design aspects...
Christophe Wolinski, Krzysztof Kuchcinski, Erwan R...
ICCD
2006
IEEE
107views Hardware» more  ICCD 2006»
14 years 4 months ago
Design and Implementation of the TRIPS Primary Memory System
Abstract— In this paper, we describe the design and implementation of the primary memory system of the TRIPS processor. To match the aggressive execution bandwidth and support hi...
Simha Sethumadhavan, Robert G. McDonald, Rajagopal...
DATE
2006
IEEE
110views Hardware» more  DATE 2006»
14 years 1 months ago
Configurable multiprocessor platform with RTOS for distributed execution of UML 2.0 designed applications
This paper presents the design and full prototype implementation of a configurable multiprocessor platform that supports distributed execution of applications described in UML 2.0...
Tero Arpinen, Petri Kukkala, Erno Salminen, Marko ...