352 search results - page 28 / 71 » Experiences with Soft-Core Processor Design |
DAC
2006
ACM
14 years 8 months ago
2006
ACM
Packet editing is a fundamental building block of data communication systems such as switches and routers. Circuits that implement this function are critical and define the featur...
SC
2009
ACM
14 years 2 months ago
2009
ACM
The management of shared caches in multicore processors is a critical and challenging task. Many hardware and OS-based methods have been proposed. However, they may be hardly adop...
ICCD
2008
IEEE
14 years 4 months ago
2008
IEEE
—This paper presents a high-performance parallel context-based adaptive length coding (CAVLC) encoder implemented on a fine-grained many-core system. The software encoder is desi...
EUROPAR
2000
Springer
13 years 11 months ago
2000
Springer
The aim of this paper is to study the influence of processor mapping on message passing performance of two different parallel computers: the Cray T3E and the SGI Origin 2000. For t...
SIGMETRICS
2003
ACM
14 years 1 months ago
2003
ACM
In main-memory databases, the number of processor cache misses has a critical impact on the performance of the system. Cacheconscious indices are designed to improve performance b...