375 search results - page 6 / 75 » Explicit gate delay model for timing evaluation |
DATE
2006
IEEE
14 years 1 months ago
2006
IEEE
Abstract— Continuing scaling of CMOS technology has allowed aggressive pursuant of increased clock rate in DSM chips. The ever shorter clock period has made switching times of di...
DATE
2010
IEEE
14 years 22 days ago
2010
IEEE
With aggressive gate oxide scaling, latent defects in the gate oxide manifest as traps that, in time, lead to gate oxide breakdown. Progressive gate oxide breakdown, also referred...
ASPDAC
2006
ACM
14 years 1 months ago
2006
ACM
- One of the critical issues in MTCMOS design is how to estimate a circuit delay quickly. In this paper, we propose a delay modeling and static timing analysis (STA) methodology ta...
SENSYS
2009
ACM
14 years 2 months ago
2009
ACM
The state of the art congestion control algorithms for wireless sensor networks respond to coarse-grained feedback regarding available capacity in the network with an additive inc...
ICCAD
1998
IEEE
13 years 11 months ago
1998
IEEE
This paper introduces Lazy Transitions Systems (LzTSs). The notion of laziness explicitly distinguishes between the enabling and the firing of an event in a transition system. LzT...