5675 search results - page 161 / 1135 » Exploiting Chaos for Computation |
118
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DAC
2009
ACM
16 years 5 months ago
2009
ACM
Post-silicon validation has recently drawn designers' attention due to its increasing impacts on the VLSI design cycle and cost. One key feature of the post-silicon validatio...
110
Voted
DAC
2009
ACM
16 years 5 months ago
2009
ACM
In this paper, we compare embedded-DRAM (eDRAM) testing to both SRAM testing and commodity-DRAM testing, since an eDRAM macro uses DRAM cells with an SRAM interface. We first star...
127
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DAC
2003
ACM
16 years 5 months ago
2003
ACM
Bounded Model Checking (BMC) based on Boolean Satisfiability (SAT) procedures has recently gained popularity as an alternative to BDD-based model checking techniques for finding b...
141
Voted
DAC
2006
ACM
16 years 5 months ago
2006
ACM
For a space compactor, degradation of fault detection capability caused by the masking effects from unknown values is much more serious than that caused by error masking (i.e. ali...
141
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DAC
2006
ACM
16 years 5 months ago
2006
ACM
Design and verification of systems at the Register-Transfer (RT) or behavioral level require the ability to reason at higher levels of abstraction. Difference logic consists of an...