33 search results - page 4 / 7 » Exploiting FPGA Concurrency to Enhance JVM Performance |
IPPS
2007
IEEE
14 years 1 months ago
2007
IEEE
This paper presents and evaluates a strategy for integrating the Snort network intrusion detection system into a high-performance programmable Ethernet network interface card (NIC...
DATE
2005
IEEE
14 years 17 days ago
2005
IEEE
This paper explores methods for hardware acceleration of Hidden Markov Model (HMM) decoding for the detection of persons in still images. Our architecture exploits the inherent st...
ASPLOS
2009
ACM
14 years 7 months ago
2009
ACM
The growth in complexity of modern systems makes it increasingly difficult to extract high-performance. The software stacks for such systems typically consist of multiple layers a...
TC
2010
13 years 5 months ago
2010
—As the cost per bit of NAND flash memory devices rapidly decreases, NAND-flash-based Solid-State Disks (SSDs) are replacing Hard Disk Drives (HDDs) used in a wide spectrum of co...
ICCD
2007
IEEE
14 years 3 months ago
2007
IEEE
In single processor architectures, computationallyintensive functions are typically accelerated using hardware accelerators, which exploit the concurrency in the function code to ...