6 search results - page 1 / 2 » Exploiting bank locality in multi-bank memories |
CASES
2003
ACM
13 years 12 months ago
2003
ACM
Bank locality can be defined as localizing the number of load/store accesses to a small set of memory banks at a given time. An optimizing compiler can modify a given input code t...
ISSS
2002
IEEE
13 years 11 months ago
2002
IEEE
This paper presents a novel low-energy memory design technique, considering effective bitwidth of variables for applicationspecific systems, called VAbM technique. It targets th...
ISCA
2000
IEEE
13 years 11 months ago
2000
IEEE
The bandwidth and latency of a memory system are strongly dependent on the manner in which accesses interact with the “3-D” structure of banks, rows, and columns characteristi...
HIPEAC
2011
Springer
12 years 6 months ago
2011
Springer
In chip multiprocessors (CMPs), data accesslatency dependson the memory hierarchy organization, the on-chip interconnect (NoC), and the running workload. Reducing data access late...
HPCA
2007
IEEE
14 years 7 months ago
2007
IEEE
Utilizing the nonuniform latencies of SDRAM devices, access reordering mechanisms alter the sequence of main memory access streams to reduce the observed access latency. Using a r...