11 search results - page 1 / 3 » Exploiting parallelism and structure to accelerate the simul... |
HPCA
2006
IEEE
14 years 7 months ago
2006
IEEE
Simulation is an important means of evaluating new microarchitectures. Current trends toward chip multiprocessors (CMPs) try the ability of designers to develop efficient simulato...
MICRO
2010
IEEE
13 years 5 months ago
2010
IEEE
As the number of cores on a single chip increases with more recent technologies, a packet-switched on-chip interconnection network has become a de facto communication paradigm for ...
PPOPP
2006
ACM
14 years 1 months ago
2006
ACM
As multi-core architectures with Thread-Level Speculation (TLS) are becoming better understood, it is important to focus on TLS compilation. TLS compilers are interesting in that,...
VLDB
2005
ACM
14 years 28 days ago
2005
ACM
With the advent of chip multiprocessors, exploiting intra-transaction parallelism is an attractive way of improving transaction performance. However, exploiting intra-transaction ...
DATE
2010
IEEE
14 years 16 days ago
2010
IEEE
—Multi-Processor System-on-Chips (MPSoCs) exploit task-level parallelism to achieve high computation throughput, but concurrent memory accesses from multiple PEs may cause memory...