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» Exploiting regularity for low-power design
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CACM
2000
158views more  CACM 2000»
13 years 7 months ago
Wireless Integrated Network Sensors
Wireless Integrated Network Sensors (WINS) now provide a new monitoring and control capability for transportation, manufacturing, health care, environmental monitoring, and safety...
Gregory J. Pottie, William J. Kaiser
ICCAD
1996
IEEE
85views Hardware» more  ICCAD 1996»
13 years 11 months ago
Exploiting regularity for low-power design
Abstract -- Current day behavioral-synthesis techniques produce architectures that are power-inefficient in the interconnect. Experiments have demonstrated that in synthesized desi...
Renu Mehra, Jan M. Rabaey
ISVLSI
2003
IEEE
138views VLSI» more  ISVLSI 2003»
14 years 21 days ago
Bouncing Threads: Merging a New Execution Model into a Nanotechnology Memory
The need for small, high speed, low power computers as the end of Moore’s law approaches is driving research into nanotechnology. These novel devices have significantly differe...
Sarah E. Frost, Arun Rodrigues, Charles A. Giefer,...
ISLPED
2003
ACM
86views Hardware» more  ISLPED 2003»
14 years 20 days ago
Exploiting compiler-generated schedules for energy savings in high-performance processors
This paper develops a technique that uniquely combines the advantages of static scheduling and dynamic scheduling to reduce the energy consumed in modern superscalar processors wi...
Madhavi Gopal Valluri, Lizy Kurian John, Heather H...
ISLPED
2010
ACM
193views Hardware» more  ISLPED 2010»
13 years 7 months ago
PASAP: power aware structured ASIC placement
Structured ASICs provide an exciting middle ground between FPGA and ASIC design methodologies. Compared to ASIC, structured ASIC based designs require lower non recurring engineer...
Ashutosh Chakraborty, David Z. Pan