21 search results - page 4 / 5 » Exploring Fault-Tolerant Network-on-Chip Architectures |
DAC
2002
ACM
14 years 8 months ago
2002
ACM
Software-based self-test (SBST) is emerging as a promising technology for enabling at-speed test of high-speed microprocessors using low-cost testers. We explore the fault diagnos...
ICCD
2006
IEEE
14 years 4 months ago
2006
IEEE
— As the geometries of the transistors reach the physical limits of operation, one of the main design challenges of Systems-on-Chips (SoCs) will be to provide dynamic (run-time) ...
MICRO
2009
IEEE
14 years 2 months ago
2009
IEEE
Aggressive technology scaling to 45nm and below introduces serious reliability challenges to the design of microprocessors. Large SRAM structures used for caches are particularly ...
EUROGP
2009
Springer
14 years 9 days ago
2009
Springer
The contribution presented herein proposes an adaptive genetic algorithm applied to quantum logic circuit synthesis that, dynamically adjusts its control parameters. The adaptation...
SIGCOMM
2004
ACM
14 years 1 months ago
2004
ACM
The limitations of BGP routing in the Internet are often blamed for poor end-to-end performance and prolonged connectivity interruptions. Recent work advocates using overlays to e...