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ISPASS
2006
IEEE
14 years 22 days ago
Modeling TCAM power for next generation network devices
Applications in Computer Networks often require high throughput access to large data structures for lookup and classification. Many advanced algorithms exist to speed these searc...
Banit Agrawal, Timothy Sherwood
MOBIHOC
2009
ACM
14 years 7 months ago
Delay and effective throughput of wireless scheduling in heavy traffic regimes: vacation model for complexity
Distributed scheduling algorithms for wireless ad hoc networks have received substantial attention over the last decade. The complexity levels of these algorithms span a wide spec...
Yung Yi, Junshan Zhang, Mung Chiang
MICRO
2007
IEEE
115views Hardware» more  MICRO 2007»
14 years 1 months ago
Optimizing NUCA Organizations and Wiring Alternatives for Large Caches with CACTI 6.0
A significant part of future microprocessor real estate will be dedicated to L2 or L3 caches. These on-chip caches will heavily impact processor performance, power dissipation, a...
Naveen Muralimanohar, Rajeev Balasubramonian, Norm...
IEEEPACT
2003
IEEE
13 years 12 months ago
Redeeming IPC as a Performance Metric for Multithreaded Programs
Recent work has shown that multithreaded workloads running in execution-driven, full-system simulation environments cannot use instructions per cycle (IPC) as a valid performance ...
Kevin M. Lepak, Harold W. Cain, Mikko H. Lipasti
ISSS
2002
IEEE
138views Hardware» more  ISSS 2002»
13 years 11 months ago
An Object-Oriented Design Process for System-on-Chip Using UML
The object-oriented design process has been a hot topic in software development since it will improve product quality and productivity significantly, which is also a major issue i...
Tsuneo Nakata, Akio Matsuda, Minoru Shoji, Shinya ...