1136 search results - page 22 / 228 » Exploring the multiple-GPU design space |
RSP
2006
IEEE
14 years 3 months ago
2006
IEEE
Embedded real-time multimedia applications usually imply data parallel processing. SIMD processors embedded in SOCs are cost-effective to exploit the underlying parallelism. Howev...
DATE
2010
IEEE
14 years 2 months ago
2010
IEEE
—This paper presents a design space exploration of a selective load value prediction scheme suitable for energyaware Simultaneous Multi-Threaded (SMT) architectures. A load value...
DATE
2009
IEEE
14 years 3 months ago
2009
IEEE
As industry moves towards many-core chips, networks-on-chip (NoCs) are emerging as the scalable fabric for interconnecting the cores. With power now the first-order design constr...
DAC
2006
ACM
14 years 10 months ago
2006
ACM
Pareto surfaces in the performance space determine the range of feasible performance values for a circuit topology in a given technology. We present a non-dominated sorting based ...
CODES
2006
IEEE
14 years 3 months ago
2006
IEEE
This paper presents a methodology to combine Transaction Level Modeling and System/Network co-simulation for the design of networked embedded systems. As a result, a new design di...