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» Extending Platform-Based Design to Network on Chip Systems
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MASCOTS
2007
13 years 9 months ago
A Novel Flow Control Scheme for Best Effort Traffic in NoC Based on Source Rate Utility Maximization
—Advances in semiconductor technology, has enabled designers to put complex, massively parallel multiprocessor systems on a single chip. Network on Chip (NoC) that supports high ...
Mohammad Sadegh Talebi, Fahimeh Jafari, Ahmad Khon...
DAC
2002
ACM
14 years 8 months ago
Analysis of power consumption on switch fabrics in network routers
In this paper, we introduce a framework to estimate the power consumption on switch fabrics in network routers. We propose different modeling methodologies for node switches, inte...
Terry Tao Ye, Giovanni De Micheli, Luca Benini
HOTI
2008
IEEE
14 years 2 months ago
A Network Fabric for Scalable Multiprocessor Systems
Much of high performance technical computing has moved from shared memory architectures to message based cluster systems. The development and wide adoption of the MPI parallel pro...
Nitin Godiwala, Jud Leonard, Matthew Reilly
ASPDAC
2007
ACM
174views Hardware» more  ASPDAC 2007»
13 years 11 months ago
Energy-Efficient Real-Time Task Scheduling in Multiprocessor DVS Systems
Dynamic voltage scaling (DVS) circuits have been widely adopted in many computing systems to provide tradeoff between performance and power consumption. The effective use of energ...
Jian-Jia Chen, Chuan-Yue Yang, Tei-Wei Kuo, Chi-Sh...
DATE
2006
IEEE
128views Hardware» more  DATE 2006»
14 years 1 months ago
Efficient link capacity and QoS design for network-on-chip
This paper addresses the allocation of link capacities in the automated design process of a network-on-chip based system. Communication resource costs are minimized under Quality-...
Zvika Guz, Isask'har Walter, Evgeny Bolotin, Israe...