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» Extremely Low-Power Logic
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DAC
1996
ACM
13 years 11 months ago
POSE: Power Optimization and Synthesis Environment
Recent trends in the semiconductor industry have resulted in an increasing demand for low power circuits. POSE is a step in providing the EDA community and academia with an enviro...
Sasan Iman, Massoud Pedram
CORR
2010
Springer
152views Education» more  CORR 2010»
13 years 5 months ago
Fault Tolerant Variable Block Carry Skip Logic (VBCSL) using Parity Preserving Reversible Gates
Reversible logic design has become one of the promising research directions in low power dissipating circuit design in the past few years and has found its application in low power...
Md. Saiful Islam 0003, Muhammad Mahbubur Rahman, Z...
LCN
2008
IEEE
14 years 2 months ago
What's new? Message reduction in sensor networks using events
—Observing the environment is the raison d’ ˆetre of sensor networks, but the precise reconstruction of the measured process requires too many messages for a low power sensor ...
Andreas Köpke, Adam Wolisz
ACISP
2000
Springer
13 years 12 months ago
An Extremely Small and Efficient Identification Scheme
We present a new identification scheme which is based on Legendre symbols modulo a certain hidden prime and which is naturally suited for low power, low memory applications. 1 Ove...
William D. Banks, Daniel Lieman, Igor Shparlinski
ASAP
2003
IEEE
107views Hardware» more  ASAP 2003»
14 years 27 days ago
Energy Aware Register File Implementation through Instruction Predecode
The register file is a power-hungry device in modern architectures. Current research on compiler technology and computer architectures encourages the implementation of larger dev...
José L. Ayala, Marisa Luisa López-Va...