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CONSTRAINTS
2002
107views more  CONSTRAINTS 2002»
13 years 8 months ago
Fourier Elimination for Compiling Constraint Hierarchies
Linear equality and inequality constraints arise naturally in specifying many aspects of user interfaces, such as requiring that one window be to the left of another, requiring tha...
Warwick Harvey, Peter J. Stuckey, Alan Borning
DATE
2010
IEEE
197views Hardware» more  DATE 2010»
13 years 3 months ago
Compilation of stream programs for multicore processors that incorporate scratchpad memories
The stream processing characteristics of many embedded system applications in multimedia and networking domains have led to the advent of stream based programming formats. Several ...
Weijia Che, Amrit Panda, Karam S. Chatha
ICCAD
2005
IEEE
141views Hardware» more  ICCAD 2005»
14 years 5 months ago
Architecture and compilation for data bandwidth improvement in configurable embedded processors
Many commercially available embedded processors are capable of extending their base instruction set for a specific domain of applications. While steady progress has been made in t...
Jason Cong, Guoling Han, Zhiru Zhang
DATE
2008
IEEE
62views Hardware» more  DATE 2008»
14 years 3 months ago
Instruction Cache Energy Saving Through Compiler Way-Placement
Fetching instructions from a set-associative cache in an embedded processor can consume a large amount of energy due to the tag checks performed. Recent proposals to address this ...
Timothy M. Jones, Sandro Bartolini, Bruno De Bus, ...
IEEEPACT
2005
IEEE
14 years 2 months ago
Design and Implementation of a Compiler Framework for Helper Threading on Multi-core Processors
Helper threading is a technique that utilizes a second core or logical processor in a multi-threaded system to improve the performance of the main thread. A helper thread executes...
Yonghong Song, Spiros Kalogeropulos, Partha Tiruma...