79 search results - page 7 / 16 » FPGA Implementation of Modular Exponentiation |
DSD
2008
IEEE
14 years 1 months ago
2008
IEEE
We propose a parallel and modular architecture well suited to 802.16e WiMax LDPC code decoding. The proposed design is fully compliant with all the code classes defined by the Wi...
CHES
2003
Springer
14 years 21 days ago
2003
Springer
The recent developments of side channel attacks have lead implementers to use more and more sophisticated countermeasures in critical operations such as modular exponentiation, or ...
DATE
2010
IEEE
14 years 17 days ago
2010
IEEE
For any computing system to be secure, both hardware and software have to be trusted. If the hardware layer in a secure system is compromised, not only it would be possible to ext...
DATE
2006
IEEE
14 years 1 months ago
2006
IEEE
This paper presents an RSA hardware design that simultaneously achieves high-performance and lowpower. A bit-oriented, split modular multiplication algorithm and architecture are ...
DATE
2003
IEEE
14 years 23 days ago
2003
IEEE
In this paper we present an hardware implementation of the RSA algorithm for public-key cryptography. The RSA algorithm consists in the computation of modular exponentials on larg...