134 search results - page 8 / 27 » FPGA implementation of log-polar mapping |
222
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FPGA
2012
ACM
14 years 3 months ago
2012
ACM
In floating-point datapaths synthesized on FPGAs, the shifters that perform mantissa alignment and normalization consume a disproportionate number of LUTs. Shifters are implemente...
183
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FPL
2006
Springer
15 years 11 months ago
2006
Springer
FPGA devices exhibit manufacturing variability. Device ratings and Timing margins are typically used in order to cope with inter-device and intra-device variability respectively. ...
220
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DAC
2004
ACM
16 years 8 months ago
2004
ACM
Just-in-time (JIT) compilation has previously been used in many applications to enable standard software binaries to execute on different underlying processor architectures. Howev...
194
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ICCAD
1993
IEEE
15 years 11 months ago
1993
IEEE
In this paper, we present an integrated approach to synthesis and mapping to go beyond the combinatorial limit set up by the depth-optimal FlowMap algorithm. The new algorithm, na...
132
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ASAP
2007
IEEE
15 years 11 months ago
2007
IEEE
Dynamic reconfiguration allows to selectively substitute blocks of logic at run-time in order to improve the area efficiency of a FPGA design. This paper presents the design of a ...