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» FPGA interconnect design using logical effort
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ISPD
2012
ACM
252views Hardware» more  ISPD 2012»
12 years 4 months ago
Towards layout-friendly high-level synthesis
There are two prominent problems with technology scaling: increasing design complexity and more challenges with interconnect design, including routability. High-level synthesis ha...
Jason Cong, Bin Liu 0006, Guojie Luo, Raghu Prabha...
ISLPED
2005
ACM
96views Hardware» more  ISLPED 2005»
14 years 2 months ago
Power-optimal repeater insertion considering Vdd and Vth as design freedoms
This work first presents an analytical repeater insertion method which optimizes power under delay constraint for a single net. This method finds the optimal repeater insertion ...
Yu Ching Chang, King Ho Tam, Lei He
ROBIO
2006
IEEE
469views Robotics» more  ROBIO 2006»
14 years 2 months ago
FPGA-Implementation of Inverse Kinematics and Servo Controller for Robot Manipulator
- The implementation of inverse kinematics and servo controller for robot manipulator using FPGA (Field Programmer Gate Array) is investigated in this paper. Firstly, the mathemati...
Ying-Shieh Kung, Kuan-Hsuan Tseng, Chia-Sheng Chen...
IEEEPACT
2007
IEEE
14 years 3 months ago
Verification-Aware Microprocessor Design
The process of verifying a new microprocessor is a major problem for the computer industry. Currently, architects design processors to be fast, power-efficient, and reliable. Howe...
Anita Lungu, Daniel J. Sorin
SERP
2007
13 years 10 months ago
Software Engineering Design Patterns for Relational Databases
– The use of design patterns such as the GRASP (General Responsibility Assignment Software Principles) or GoF (Gang-of-Four) patterns in software engineering has been well-docume...
Cyril S. Ku, Thomas J. Marlowe, Tatyana Budanskaya...