87 search results - page 12 / 18 » FPGA power reduction using configurable dual-Vdd |
FPGA
1999
ACM
13 years 11 months ago
1999
ACM
The demand for high-speed FPGA compilation tools has occurred for three reasons: first, as FPGA device capacity has grown, the computation time devoted to placement and routing h...
AHS
2007
IEEE
14 years 1 months ago
2007
IEEE
In this paper, we present a low power implementation of H.264 adaptive deblocking filter (DBF) algorithm on ARM Versatile / PB926EJ-S Development Board. The DBF hardware is implem...
CSREAESA
2004
13 years 8 months ago
2004
Discrete wavelet transform has been incorporated as part of the JPEG2000 image compression standard and is being deployed in various portable consumer products. This raises the in...
GLVLSI
2009
IEEE
13 years 11 months ago
2009
IEEE
Modern embedded devices (e.g., PDAs, mobile phones) are now incorporating Java as a very popular implementation language in their designs. These new embedded systems include multi...
DAC
2005
ACM
13 years 9 months ago
2005
ACM
This paper describes a novel technique called Embedded Test-bench Control (ETC), extensively used in the verification of Tensilica’s latest configurable processor. Conventional ...