87 search results - page 5 / 18 » FPGA power reduction using configurable dual-Vdd |
FCCM
1998
IEEE
13 years 11 months ago
1998
IEEE
One of the major overheads in reconfigurable computing is the time it takes to reconfigure the devices in the system. This overhead limits the speedups possible in this exciting n...
FPL
2009
Springer
14 years 2 days ago
2009
Springer
Motion Estimation (ME) is the most computationally intensive and the most power consuming part of video compression and video enhancement systems. In this paper, we propose a nove...
FCCM
2008
IEEE
13 years 7 months ago
2008
IEEE
Communications infrastructure for modular reconfiguration of FPGAs needs to support the changing communications interfaces of a sequence of modules. In order to avoid the overhead...
FCCM
1999
IEEE
13 years 11 months ago
1999
IEEE
The time it takes to reconfigure FPGAs can be a significant overhead for reconfigurable computing. In this paper we develop new compression algorithms for FPGA configurations that...
ICCAD
2003
IEEE
14 years 4 months ago
2003
IEEE
As Field-Programmable Gate Array (FPGA) power consumption continues to increase, lower power FPGA circuitry, architectures, and Computer-Aided Design (CAD) tools need to be develo...