Sciweavers

85 search results - page 9 / 17
» Fast Out-Of-Order Processor Simulation Using Memoization
Sort
View
ISLPED
2006
ACM
140views Hardware» more  ISLPED 2006»
14 years 2 months ago
L-CBF: a low-power, fast counting bloom filter architecture
—An increasing number of architectural techniques rely on hardware counting bloom filters (CBFs) to improve upon the enegy, delay and complexity of various processor structures. ...
Elham Safi, Andreas Moshovos, Andreas G. Veneris
HPCA
2005
IEEE
14 years 9 months ago
Voltage and Frequency Control With Adaptive Reaction Time in Multiple-Clock-Domain Processors
Dynamic voltage and frequency scaling (DVFS) is a widely-used method for energy-efficient computing. In this paper, we present a new intra-task online DVFS scheme for multiple clo...
Qiang Wu, Philo Juang, Margaret Martonosi, Douglas...
WSC
2004
13 years 10 months ago
A Framework for Adaptive Synchronization of Distributed Simulations
Increased complexity of simulation models and the related modeling needs for global supply chains have necessitated the execution of simulations on multiple processors. While dist...
Bertan Altuntas, Richard A. Wysk
CASES
2006
ACM
14 years 2 months ago
Code transformation strategies for extensible embedded processors
Embedded application requirements, including high performance, low power consumption and fast time to market, are uncommon in the broader domain of general purpose applications. I...
Paolo Bonzini, Laura Pozzi
ISCA
1999
IEEE
110views Hardware» more  ISCA 1999»
14 years 26 days ago
Decoupling Local Variable Accesses in a Wide-Issue Superscalar Processor
Providing adequate data bandwidth is extremely important for a wide-issue superscalar processor to achieve its full performance potential. Adding a large number of ports to a data...
Sangyeun Cho, Pen-Chung Yew, Gyungho Lee