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DAC
2002
ACM
14 years 9 months ago
A fast on-chip profiler memory
Profiling an application executing on a microprocessor is part of the solution to numerous software and hardware optimization and design automation problems. Most current profilin...
Roman L. Lysecky, Susan Cotterell, Frank Vahid
ICML
2008
IEEE
14 years 8 months ago
Fast solvers and efficient implementations for distance metric learning
In this paper we study how to improve nearest neighbor classification by learning a Mahalanobis distance metric. We build on a recently proposed framework for distance metric lear...
Kilian Q. Weinberger, Lawrence K. Saul
COLING
2010
13 years 3 months ago
2D Trie for Fast Parsing
In practical applications, decoding speed is very important. Modern structured learning technique adopts template based method to extract millions of features. Complicated templat...
Xian Qian, Qi Zhang, Xuanjing Huang, Lide Wu
ISCA
2011
IEEE
229views Hardware» more  ISCA 2011»
12 years 11 months ago
TLSync: support for multiple fast barriers using on-chip transmission lines
As the number of cores on a single-chip grows, scalable barrier synchronization becomes increasingly difficult to implement. In software implementations, such as the tournament ba...
Jungju Oh, Milos Prvulovic, Alenka G. Zajic
SIAMSC
2011
140views more  SIAMSC 2011»
12 years 10 months ago
A Fast Parallel Algorithm for Selected Inversion of Structured Sparse Matrices with Application to 2D Electronic Structure Calcu
Abstract. An efficient parallel algorithm is presented and tested for computing selected components of H−1 where H has the structure of a Hamiltonian matrix of two-dimensional la...
Lin Lin, Chao Yang, Jianfeng Lu, Lexing Ying, Wein...