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ICCAD
2007
IEEE
115views Hardware» more  ICCAD 2007»
14 years 4 months ago
Timing optimization by restructuring long combinatorial paths
—We present an implementation of an algorithm for constructing provably fast circuits for a class of Boolean functions with input signals that have individual starting times. We ...
Jürgen Werber, Dieter Rautenbach, Christian S...
DATE
1998
IEEE
165views Hardware» more  DATE 1998»
14 years 1 days ago
AGENDA: An Attribute Grammar Driven Environment for the Design Automation of Digital Systems
Attribute grammars have been used extensively in every phase of traditional compiler construction. Recently, it has been shown that they can also be effectively adopted to handle ...
George Economakos, George K. Papakonstantinou, Pan...
ISPD
2007
ACM
76views Hardware» more  ISPD 2007»
13 years 9 months ago
Semi-detailed bus routing with variation reduction
A bus routing algorithm is presented which not only minimizes wire length but also selects the bits in the bus to avoid twisting and conflicts. The resulting bus routes are regula...
Fan Mo, Robert K. Brayton
VMV
2004
208views Visualization» more  VMV 2004»
13 years 9 months ago
Fourier Volume Rendering on the GPU Using a Split-Stream-FFT
The Fourier volume rendering technique operates in the frequency domain and creates line integral projections of a 3D scalar field. These projections can be efficiently generated ...
Thomas Jansen, Bartosz von Rymon-Lipinski, Nils Ha...
ISCAS
2005
IEEE
124views Hardware» more  ISCAS 2005»
14 years 1 months ago
Parallel FFT computation with a CDMA-based network-on-chip
— Fast Fourier transform (FFT) algorithms are used in a wide variety of digital signal processing applications and many of these require high-performance parallel implementations...
Daewook Kim, Manho Kim, Gerald E. Sobelman