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DATE
2009
IEEE
122views Hardware» more  DATE 2009»
14 years 2 months ago
MTJ-based nonvolatile logic-in-memory circuit, future prospects and issues
—Nonvolatile logic-in-memory architecture, where nonvolatile memory elements are distributed over a logic-circuit plane, is expected to realize both ultra-low-power and reduced i...
Shoun Matsunaga, Jun Hayakawa, Shoji Ikeda, Katsuy...
ISCAS
2008
IEEE
230views Hardware» more  ISCAS 2008»
14 years 2 months ago
Joint optimization of data hiding and video compression
— From copyright protection to error concealment, video data hiding has found usage in a great number of applications. Recently proposed applications such as privacy data preserv...
Jithendra K. Paruchuri, Sen-Ching S. Cheung
ASYNC
2007
IEEE
154views Hardware» more  ASYNC 2007»
14 years 2 months ago
Design of a High-Speed Asynchronous Turbo Decoder
This paper explores the advantages of high performance asynchronous circuits in a semi-custom standard cell environment for high-throughput turbo coding. Turbo codes are high-perf...
Pankaj Golani, Georgios D. Dimou, Mallika Prakash,...
SBACPAD
2007
IEEE
85views Hardware» more  SBACPAD 2007»
14 years 2 months ago
Exigency-based real-time scheduling policy to provide absolute QoS for web services
— Telemedicine, distance learning and e-commerce applications impose time constraints directly related to the efficacy of their operations. In order to offer reliability levels ...
Lucas S. Casagrande, Rodrigo Fernandes de Mello, R...
DSD
2006
IEEE
107views Hardware» more  DSD 2006»
14 years 1 months ago
A High Level Power Model for the Nostrum NoC
We propose a power model for the Nostrum NoC. For this purpose an empirical power model of links and switches has been formulated and validated with the Synopsys Power Compiler. T...
Sandro Penolazzi, Axel Jantsch