160 search results - page 3 / 32 » Fast simulation of VLSI interconnects |
ISCA
1999
IEEE
13 years 11 months ago
1999
IEEE
In the pursuit of instruction-level parallelism, significant demands are placed on a processor's instruction delivery mechanism. Delivering the performance necessary to meet ...
DFT
2007
IEEE
14 years 1 months ago
2007
IEEE
During semiconductor manufacturing, particles undesirably depose on the surface of the wafer causing “open” and “short” defects to interconnects. In this paper, a third ty...
ASPDAC
2004
ACM
14 years 16 days ago
2004
ACM
Congestion estimation is an important issue for the success of the VLSI layout. Fast congestion estimation provides an efficient means to adjust the placement and wire planning. A...
DAC
1996
ACM
13 years 11 months ago
1996
ACM
Measured Equation of Invariance(MEI) is a new concept in computational electromagnetics. It has been demonstrated that the MEI technique can be used to terminate the meshes very c...
DAC
1998
ACM
14 years 8 months ago
1998
ACM
As VLSI circuit speeds have increased, reliable chip and system design can no longer be performed without accurate threedimensional interconnect models. In this paper, we describe...