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» Fault Analysis of DPA-Resistant Algorithms
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DAC
1994
ACM
13 years 11 months ago
Dynamic Search-Space Pruning Techniques in Path Sensitization
A powerful combinational path sensitization engine is required for the efficient implementation of tools for test pattern generation, timing analysis, and delay fault testing. Path...
João P. Marques Silva, Karem A. Sakallah
ISQED
2010
IEEE
156views Hardware» more  ISQED 2010»
13 years 9 months ago
On the design of different concurrent EDC schemes for S-Box and GF(p)
Recent studies have shown that an attacker can retrieve confidential information from cryptographic hardware (e.g. the secret key) by introducing internal faults. A secure and re...
Jimson Mathew, Hafizur Rahaman, Abusaleh M. Jabir,...
AAAI
2012
11 years 10 months ago
Learning Behavior Models for Hybrid Timed Systems
A tailored model of a system is the prerequisite for various analysis tasks, such as anomaly detection, fault identification, or quality assurance. This paper deals with the algo...
Oliver Niggemann, Benno Stein, Asmir Vodencarevic,...
IJCNN
2000
IEEE
13 years 12 months ago
Neural Networks for Novelty Detection in Airframe Strain Data
The structural health of airframes is often monitored by analysis of the frequency of occurrence matrix (FOOM) produced after each flight. Each cell in the matrix records a stres...
Simon J. Hickinbotham, James Austin
DAC
2010
ACM
13 years 11 months ago
LUT-based FPGA technology mapping for reliability
As device size shrinks to the nanometer range, FPGAs are increasingly prone to manufacturing defects. We anticipate that the ability to tolerate multiple defects will be very impo...
Jason Cong, Kirill Minkovich